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Zbl 0755.65143
Reed, Irving S.; Shih, Ming-Tang; Truong, T.K.; Hendon, E.; Tufts, D.W.
A VLSI architecture for simplified arithmetic Fourier transform algorithm. (English)
[J] IEEE Trans. Signal Process. 40, No.5, 1122-1133 (1992). ISSN 1053-587X

The arithmetic Fourier transform (AFT) is based on a number-theoretic approach to Fourier analysis. A VLSI architecture is introduced into the AFT algorithm to improve its complexity. In fact, the number of additions is reduced by 25 \% of that used in the direct method. Complex multiplications is not required. This algorithm is suited ideally to parallel processing and data-flow methods.
[Y.Kobayashi (Tottori)]

MSC 2000:: *65T50 Discrete and fast Fourier transforms
68W35 VLSI algorithms

Keywords: butterfly structure; arithmetic Fourier transform; VLSI architecture; complexity; parallel processing; data-flow methods

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