Culik, Karel II; Gruska, J.; Salomaa, A. Systolic automata for VLSI on balanced trees. (English) Zbl 0493.68054 Acta Inf. 18, 335-344 (1983). Page: −5 −4 −3 −2 −1 ±0 +1 +2 +3 +4 +5 Show Scanned Page Cited in 5 ReviewsCited in 24 Documents MSC: 68Q45 Formal languages and automata 94C15 Applications of graph theory to circuits and networks Keywords:systolic tree automata; input conditions; decidability; characterization of acceptable languages PDFBibTeX XMLCite \textit{K. Culik II} et al., Acta Inf. 18, 335--344 (1983; Zbl 0493.68054) Full Text: DOI References: [1] Culik II, K., Salomaa, A., Wood, D.: VLSI systolic trees as acceptors. Res. Rept. CS-81-32, Dept. of Computer Science, University of Waterloo, Waterloo, Ontario, 1981 · Zbl 0571.68043 [2] Culik II, K., Gruska, J., Salomaa, A.: Systolic trellis automata (for VLSI). Ibid., CS-81-34 · Zbl 0571.68041 [3] Culik II, K., Gruska, J., Salomaa, A.: On a family of L languages resulting from systolic tree automata. Ibid., CS-81-36 [4] Culik II, K., Gruska, J., Salomaa, A.: On nonregular context-free languages and pumping. EATCS Bulletin 16, 22-24 (1982) This reference list is based on information provided by the publisher or from digital mathematics libraries. Its items are heuristically matched to zbMATH identifiers and may contain data conversion errors. In some cases that data have been complemented/enhanced by data from zbMATH Open. This attempts to reflect the references listed in the original paper as accurately as possible without claiming completeness or a perfect matching.