05448980

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05448980 Manohararajah, Valavan Brown, Stephen Dean Vranesic, Zvonko G. Heuristics for area minimization in LUT-based FPGA technology mapping. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 25, No. 11, 2331-2340 (2006). 2006 IEEE, New York, NY EN

doi:10.1109/TCAD.2006.882119