Result 1 to 20 of 24 total
Evolutionary design of collective communications on wormhole NoCs. (English)
Phan Cong-Vinh (ed.), Autonomic networking-on-chip. Bio-inspired specification, development and verification. Boca Raton, FL: CRC Press (ISBN 978-1-4398-2911-0/hbk). Embedded Multi-Core Systems, 69-103 (2012).
1
A simple and efficient input selection function for networks-on-chip. (English)
Bononi, Luciano (ed.) et al., Distributed computing and networking. 13th international conference, ICDCN 2012, Hong Kong, China, January 3‒6, 2012. Proceedings. Berlin: Springer (ISBN 978-3-642-25958-6/pbk). Lecture Notes in Computer Science 7129, 525-539 (2012).
2
Using well-solvable quadratic assignment problems for VLSI interconnect applications. (English)
Discrete Appl. Math. 160, No. 4-5, 525-535 (2012).
3
Topology-aware quality-of-service support in highly integrated chip multiprocessors. (English)
Varbanescu, Ana Lucia (ed.) et al., Computer architecture. ISCA 2010 international workshops A4MMC, AMAS-BT, EAMA, WEED, WIOSCA, Saint-Malo, France, June 19‒23, 2010. Revised selected papers. Berlin: Springer (ISBN 978-3-642-24321-9/pbk). Lecture Notes in Computer Science 6161, 357-375 (2011).
4
Power-aware run-time incremental mapping for 3-D networks-on-chip. (English)
Altman, Erik (ed.) et al., Network and parallel computing. 8th IFIP international conference, NPC 2011, Changsha, China, October 21‒23, 2011. Proceedings. Berlin: Springer (ISBN 978-3-642-24402-5/pbk). Lecture Notes in Computer Science 6985, 232-247 (2011).
5
A multi-level routing scheme and router architecture to support hierarchical routing in large network on chip platforms. (English)
Guarracino, Mario R. (ed.) et al., Euro-Par 2010 parallel processing workshops. HeteroPar, HPCC, HiBB, CoreGrid, UCHPC, HPCF, PROPER, CCPI, VHPC. Ischia, Italy, August 31 ‒ September 3, 2010. Revised selected papers. Berlin: Springer (ISBN 978-3-642-21877-4/pbk). Lecture Notes in Computer Science 6586, 153-161 (2011).
6
A new test scheduling algorithm based on Networks-on-Chip as Test Access Mechanisms. (English)
J. Parallel Distrib. Comput. 71, No. 5, 675-686 (2011).
7
Time-division-multiplexed arbitration in silicon nanophotonic networks-on-chip for high-performance chip multiprocessors. (English)
J. Parallel Distrib. Comput. 71, No. 5, 641-650 (2011).
8
Challenges in verifying communication fabrics. (English)
van Eekelen, Marko (ed.) et al., Interactive theorem proving. Second international conference, ITP 2011, Berg en Dal, The Netherlands, August 22‒25, 2011. Proceedings. Berlin: Springer (ISBN 978-3-642-22862-9/pbk). Lecture Notes in Computer Science 6898, 18-21 (2011).
9
A communication-driven routing technique for application-specific NoCs. (English)
Int. J. Parallel Program. 39, No. 3, 357-374 (2011).
10
How to reduce packet dropping in a butterflies NoC. (English)
Concurrency Comput. Pract. Exp. 23, No. 1, 86-99 (2011).
11
Verifying deadlock-freedom of communication fabrics. (English)
Jhala, Ranjit (ed.) et al., Verification, model checking, and abstract interpretation. 12th international conference, VMCAI 2011, Austin, TX, USA, January 23‒25, 2011. Proceedings. Berlin: Springer (ISBN 978-3-642-18274-7/pbk). Lecture Notes in Computer Science 6538, 214-231 (2011).
12
A low-overhead and reliable switch architecture for network-on-chips. (English)
Integr., VLSI J. 43, No. 3, 268-278 (2010).
13
Reliability assessment of networks-on-chip based on analytical models. (English)
J. Zhejiang Univ., Sci. A 10, No. 12, 1801-1814 (2009).
14
Power dissipation of the network-on-chip in multi-processor system-on-chip dedicated for video coding applications. (English)
J. Signal Process. Syst. Signal Image Video Technol. 57, No. 2, 139-153 (2009).
15
Implications of electronics technology trends for algorithm design. (English)
Comput. J. 52, No. 6(B), 690-698 (2009).
16
Buffer planning for application-specific networks-on-chip design. (English)
Sci. China, Ser. F 52, No. 4, 547-558 (2009).
17
A networks-on-chip architecture design space exploration - the LIB. (English)
Comput. Electr. Eng. 35, No. 6, 817-836 (2009).
18
Stream transfer balancing scheme utilizing multi-path routing in networks on chip. (English)
Woods, Roger (ed.) et al., Reconfigurable computing: Architectures, tools and applications. 4th international workshop, ARC 2008, London, UK, March 26-28, 2008. Proceedings. Berlin: Springer (ISBN 978-3-540-78609-2/pbk). Lecture Notes in Computer Science 4943, 294-299 (2008).
19
A novel non-exclusive dual-mode architecture for MPSoCs-oriented network on chip designs. (English)
Bereković, Mladen (ed.) et al., Embedded computer systems: Architectures, modeling, and simulation. 8th international workshop, SAMOS 2008, Samos, Greece, July 21‒24, 2008. Proceedings. Berlin: Springer (ISBN 978-3-540-70549-9/pbk). Lecture Notes in Computer Science 5114, 96-105 (2008).
20
Result 1 to 20 of 24 total
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