Result 1 to 20 of 22 total
Reducing process variation impact on replica-timed static random access memory sense timing. (English)
Integr., VLSI J. 42, No. 4, 437-448 (2009).
1
Prospects for optical interconnects in distributed, shared-memory organized MIMD architectures. (English)
J. Supercomput. 14, No. 2, 107-128 (1999).
2
Chip card — state of standardization. (Chipkarten — Stand der Normung.) (English)
it ti. Inf.tech. Tech. Inform. 39, No. 5, 20-23 (1997).
3
Chip card — state of standardization. (Chipkarten — Stand der Normung.) (English)
Informationstechnik 39, No. 5, 20-23 (1997).
4
Chipkarten — Stand der Normung. Chip card — State of standardization. (German)
it ti. Inf.tech. Tech. Inform. 39, No. 5, 20-23 (1997).
5
Hypergraph Coloring and Reconfigured RAM Testing. (English)
IEEE Transactions on Computers 43, No.06, 725-736 (1994).
6
Testing for Coupled Cells in Random-Access Memories. (English)
IEEE Transactions on Computers 40, No.10, 1177-1180 (1991).
7
A RAM Architecture for Concurrent Access and on Chip Testing. (English)
IEEE Transactions on Computers 40, No.10, 1153-1159 (1991).
8
The Tree-Match Chip. (English)
IEEE Transactions on Computers 40, No.05, 629-639 (1991).
9
Increased Throughput for the Testing and Repair of RAMs with Redundancy. (English)
IEEE Transactions on Computers 40, No.02, 154-166 (1991).
10
Diagnosis and Repair of Memory with Coupling Faults. (English)
IEEE Transactions on Computers 38, No.04, 493-500 (1989).
11
Cache Memory Organization to Enhance the Yield of High Performance VLSI Processors. (English)
IEEE Transactions on Computers 38, No.04, 484-492 (1989).
12
Parallel Testing for Pattern-Sensitive Faults in Semiconductor Random-Access Memories. (English)
IEEE Transactions on Computers 38, No.03, 394-407 (1989).
13
Test Pattern Generation for API Faults in RAM. (English)
IEEE Transactions on Computers 37, No.11, 1426-1428 (1988).
14
TRAM: A Design Methodology for High-Performance, Easily Testable, Multimegabit RAMs. (English)
IEEE Transactions on Computers 37, No.10, 1235-1250 (1988).
15
A Transition Sequence Generator for RAM Fault Detection. (English)
IEEE Transactions on Computers 37, No.03, 362-368 (1988).
16
A 20 Bit Logarithmic Number System Processor. (English)
IEEE Transactions on Computers 37, No.02, 190-200 (1988).
17
Identification of industrial processes. The application of computers in research and production control. Transl. from the Russian by F. W. Gerretsen, ed. by P. Eykhoff. (English)
Amsterdam - New York - Oxford: North-Holland Publishing Company. XIV, 436 p. \$ 46.25; Dfl. 95.00 (1980).
18
Design of ternary COS/MOS memory and sequential circuits. (English)
IEEE Trans. Comput. 26, No. 03, 281-288 (1977).
19
The application of transistor technology to computers. (English)
IEEE Trans. Comput. 25, No. 12, 1289-1303 (1976).
20
Result 1 to 20 of 22 total
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