Result 1 to 20 of 144 total
Investigation into scaling I/O bound streaming applications productively with an all-FPGA cluster. (English)
Parallel Comput. 38, No. 8, 344-364 (2012).
1
Novel arithmetic architecture for high performance implementation of SHA-3 finalist Keccak on FPGA platforms. (English)
Choy, Oliver C. S. (ed.) et al., Reconfigurable computing: Architectures, tools and applications. 8th international symposium, ARC 2012, Hong Kong, China, March 19‒23, 2012. Proceedings. Berlin: Springer (ISBN 978-3-642-28364-2/pbk). Lecture Notes in Computer Science 7199, 372-378 (2012).
2
R-NoC: an efficient packet-switched reconfigurable networks-on-chip. (English)
Choy, Oliver C. S. (ed.) et al., Reconfigurable computing: Architectures, tools and applications. 8th international symposium, ARC 2012, Hong Kong, China, March 19‒23, 2012. Proceedings. Berlin: Springer (ISBN 978-3-642-28364-2/pbk). Lecture Notes in Computer Science 7199, 365-371 (2012).
3
Performance analysis of reconfigurable processors using MVA analysis. (English)
Choy, Oliver C. S. (ed.) et al., Reconfigurable computing: Architectures, tools and applications. 8th international symposium, ARC 2012, Hong Kong, China, March 19‒23, 2012. Proceedings. Berlin: Springer (ISBN 978-3-642-28364-2/pbk). Lecture Notes in Computer Science 7199, 342-349 (2012).
4
High performance reconfigurable architecture for double precision floating point division. (English)
Choy, Oliver C. S. (ed.) et al., Reconfigurable computing: Architectures, tools and applications. 8th international symposium, ARC 2012, Hong Kong, China, March 19‒23, 2012. Proceedings. Berlin: Springer (ISBN 978-3-642-28364-2/pbk). Lecture Notes in Computer Science 7199, 302-313 (2012).
5
Design and implementation of conjugate gradient iterative solver on FPGA. (Chinese)
J. Comput. Appl. 31, No. 9, 2571-2573 (2011).
6
The methods of heterogeneous and reconfigurable task partitioning based on DAG. (Chinese)
J. Tongji Univ., Nat. Sci. 39, No. 11, 1693-1698 (2011).
7
Interfacing operating systems and polymorphic computing platforms based on the MOLEN programming paradigm. (English)
Varbanescu, Ana Lucia (ed.) et al., Computer architecture. ISCA 2010 international workshops A4MMC, AMAS-BT, EAMA, WEED, WIOSCA, Saint-Malo, France, June 19‒23, 2010. Revised selected papers. Berlin: Springer (ISBN 978-3-642-24321-9/pbk). Lecture Notes in Computer Science 6161, 311-323 (2011).
8
Future-based on-line integrated HW/SW partitioning and co-scheduling for reconfigurabie computing systems. (English)
JISE, J. Inf. Sci. Eng. 27, No. 5, 1687-1711 (2011).
9
Efficient pipelined architecture for competitive learning. (English)
J. Parallel Distrib. Comput. 71, No. 2, 236-244 (2011).
10
Massively parallel acceleration of a document-similarity classifier to detect web attacks. (English)
J. Parallel Distrib. Comput. 71, No. 2, 225-235 (2011).
11
High performance programmable FPGA overlay for digital signal processing. (English)
Koch, Andreas (ed.) et al., Reconfigurable computing: architectures, tools and applications. 7th international symposium, ARC 2011, Belfast, UK, March 23‒25, 2011. Proceedings. Berlin: Springer (ISBN 978-3-642-19474-0/pbk). Lecture Notes in Computer Science 6578, 375-384 (2011).
12
A dynamic reconfigurable CPLD architecture for structured ASIC technology. (English)
Koch, Andreas (ed.) et al., Reconfigurable computing: architectures, tools and applications. 7th international symposium, ARC 2011, Belfast, UK, March 23‒25, 2011. Proceedings. Berlin: Springer (ISBN 978-3-642-19474-0/pbk). Lecture Notes in Computer Science 6578, 296-301 (2011).
13
Feasibility analysis of reconfigurable computing in low-power wireless sensor applications. (English)
Koch, Andreas (ed.) et al., Reconfigurable computing: architectures, tools and applications. 7th international symposium, ARC 2011, Belfast, UK, March 23‒25, 2011. Proceedings. Berlin: Springer (ISBN 978-3-642-19474-0/pbk). Lecture Notes in Computer Science 6578, 261-268 (2011).
14
A (fault-tolerant)$^{2}$ scheduler for real-time HW tasks. (English)
Koch, Andreas (ed.) et al., Reconfigurable computing: architectures, tools and applications. 7th international symposium, ARC 2011, Belfast, UK, March 23‒25, 2011. Proceedings. Berlin: Springer (ISBN 978-3-642-19474-0/pbk). Lecture Notes in Computer Science 6578, 79-87 (2011).
15
io-port 05914017 Grasset, Arnaud;
Millet, Philippe;
Bonnot, Philippe;
Yehia, Sami;
Putzke-Roeming, Wolfram;
Campi, Fabio;
Rosti, Alberto;
Huebner, Michael;
Voros, Nikolaus S.;
Rossi, Davide;
Sahlbach, Henning;
Ernst, Rolf
The MORPHEUS heterogeneous dynamically reconfigurable platform. (English)
Int. J. Parallel Program. 39, No. 3, 328-356 (2011).
16
Adaptive multiprocessor system-on-chip architecture: new degrees of freedom in system design and runtime support. (English)
Hübner, Michael (ed.) et al., Multiprocessor system-on-chip. Hardware design and tool integration. New York, NY: Springer (ISBN 978-1-4419-6459-5/hbk; 978-1-4419-6460-1/ebook). 127-151 (2011).
17
Relating the power of the multiple associative computing (MASC) model to that of reconfigurable bus-based models. (English)
J. Parallel Distrib. Comput. 70, No. 5, 458-466 (2010).
18
Reduced communication costs via network flow and scheduling for partitions of dynamically reconfigurable FPGAs. (English)
JISE, J. Inf. Sci. Eng. 26, No. 2, 565-583 (2010).
19
Dynamic domain decomposition method and its application on nonlinear problem. (English)
Wuhan Univ. J. Nat. Sci. 15, No. 1, 16-20 (2010).
20
Result 1 to 20 of 144 total
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