Result 1 to 20 of 20 total
Area-efficient instruction set extension exploration with hardware design space exploration. (English)
JISE, J. Inf. Sci. Eng. 27, No. 5, 1641-1657 (2011).
1
Fast graph-based instruction selection for multi-output instructions. (English)
Softw., Pract. Exper. 41, No. 6, 717-736 (2011).
2
Optimizing the H.264/AVC video encoder application structure for reconfigurable and application-specific platforms. (English)
J. Signal Process. Syst. Signal Image Video Technol. 60, No. 2, 183-210 (2010).
3
Design space exploration for an ASIP/co-processor architecture used in GNSS receivers. (English)
J. Signal Process. Syst. Signal Image Video Technol. 58, No. 1, 41-51 (2010).
4
Processor customization for software implementation of the AES algorithm for wireless sensor networks. (English)
Monteiro, José (ed.) et al., Integrated circuit and system design. Power and timing modeling, optimization and simulation. 19th international workshop, PATMOS 2009, Delft, The Netherlands, September 9-11, 2009. Revised selected papers. Berlin: Springer (ISBN 978-3-642-11801-2/pbk). Lecture Notes in Computer Science 5953, 326-335 (2010).
5
Programmable processor implementations of $K$-best list sphere detector for MIMO receiver. (English)
Signal Process. 90, No. 1, 313-323 (2010).
6
Design of $100 μ$W wireless sensor nodes for biomedical monitoring. (English)
J. Signal Process. Syst. Signal Image Video Technol. 57, No. 1, 107-119 (2009).
7
Parallel memory architecture for application-specific instruction-set processors. (English)
J. Signal Process. Syst. Signal Image Video Technol. 57, No. 1, 21-32 (2009).
8
High acceleration for video processing applications using specialized instruction set based on parallelism and data reuse. (English)
J. Signal Process. Syst. Signal Image Video Technol. 56, No. 2-3, 155-165 (2009).
9
Designing an ASIP for cryptographic pairings over Barreto-Naehrig curves. (English)
Clavier, Christophe (ed.) et al., Cryptographic hardware and embedded systems ‒ CHES 2009. 11th international workshop Lausanne, Switzerland, September 6‒9, 2009. Proceedings. Berlin: Springer (ISBN 978-3-642-04137-2/pbk). Lecture Notes in Computer Science 5747, 254-271 (2009).
10
SPOCS: Application specific signal processor for OFDM communication systems. (English)
J. VLSI Signal Process. 53, No. 3, 383-397 (2008).
11
Application domain specific embedded fpgas for flexible ISA-extension of asips. (English)
J. VLSI Signal Process. 53, No. 1-2, 129-143 (2008).
12
ASIP-eFPGA architecture for multioperable GNSS receivers. (English)
Bereković, Mladen (ed.) et al., Embedded computer systems: Architectures, modeling, and simulation. 8th international workshop, SAMOS 2008, Samos, Greece, July 21‒24, 2008. Proceedings. Berlin: Springer (ISBN 978-3-540-70549-9/pbk). Lecture Notes in Computer Science 5114, 136-145 (2008).
13
Evaluation of bus based interconnect mechanisms in clustered VLIW architectures. (English)
Int. J. Parallel Program. 35, No. 6, 507-527 (2007).
14
Using on-chip networks to implement polymorphism in the co-design of object-oriented embedded systems. (English)
J. Comput. Syst. Sci. 73, No. 8, 1221-1231 (2007).
15
AES on FPGA from the fastest to the smallest. (English)
Rao, Josyula R. (ed.) et al., Cryptographic hardware and embedded systems ‒ CHES 2005. 7th international workshop, Edinburgh, UK, August 29‒September 1, 2005. Proceedings. Berlin: Springer (ISBN 978-3-540-28474-1/pbk). Lecture Notes in Computer Science 3659, 427-440 (2005).
16
Design of energy-efficient application-specific instruction set processors. (English)
Boston, MA: Kluwer Academic Publishers (ISBN 1-4020-7730-0/hbk). xx, 234~p. EUR~113.00; \sterling~72.00; \$~125.00 (2004).
17
Methodical low-power ASIP design space exploration. (English)
J. VLSI Signal Process. Syst. Signal Image Video Technol. 33, No. 3, 229-246 (2003).
18
Architecture exploration for embedded processors with LISA. (English)
Boston, MA: Kluwer Academic Publishers. viii, 230 p. EUR 115.00; \$ 110.00; \sterling 74.00 (2002).
19
A computational engine for multirate FIR digital filtering. (English)
Signal Process. 79, No. 2, 213-222 (1999).
20
Result 1 to 20 of 20 total
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