Result 61 to 80 of 434 total
Variation-aware multimetric optimization during gate sizing. (English)
ACM Trans. Des. Autom. Electron. Syst. 14, No. 4 (2009).
61
A memetic approach to the automatic design of high-performance analog integrated circuits. (English)
ACM Trans. Des. Autom. Electron. Syst. 14, No. 3 (2009).
62
Methods for power optimization in SOC-based data flow systems. (English)
ACM Trans. Des. Autom. Electron. Syst. 14, No. 3 (2009).
63
Allocating power ground vias in 3D ics for simultaneous power and thermal integrity. (English)
ACM Trans. Des. Autom. Electron. Syst. 14, No. 3 (2009).
64
Simultaneous resource binding and interconnection optimization based on a distributed register-file microarchitecture. (English)
ACM Trans. Des. Autom. Electron. Syst. 14, No. 3 (2009).
65
Selective shielding technique to eliminate crosstalk transitions. (English)
ACM Trans. Des. Autom. Electron. Syst. 14, No. 3 (2009).
66
Custom topology rotary clock router with tree subnetworks. (English)
ACM Trans. Des. Autom. Electron. Syst. 14, No. 3 (2009).
67
Theories and algorithms on single-detour routing for untangling twisted bus. (English)
ACM Trans. Des. Autom. Electron. Syst. 14, No. 3 (2009).
68
High-performance obstacle-avoiding rectilinear Steiner tree construction. (English)
ACM Trans. Des. Autom. Electron. Syst. 14, No. 3 (2009).
69
Playing the trade-off game: architecture exploration using coffeee. (English)
ACM Trans. Des. Autom. Electron. Syst. 14, No. 3 (2009).
70
Word-length selection for power minimization via nonlinear optimization. (English)
ACM Trans. Des. Autom. Electron. Syst. 14, No. 3 (2009).
71
Systemj compilation using the tandem virtual machine approach. (English)
ACM Trans. Des. Autom. Electron. Syst. 14, No. 3 (2009).
72
Scenario-based timing verification of multiprocessor embedded applications. (English)
ACM Trans. Des. Autom. Electron. Syst. 14, No. 3 (2009).
73
Generating realistic stimuli for accurate power grid analysis. (English)
ACM Trans. Des. Autom. Electron. Syst. 14, No. 3 (2009).
74
Temperature-aware register reallocation for register file power-density minimization. (English)
ACM Trans. Des. Autom. Electron. Syst. 14, No. 2 (2009).
75
Cost minimization while satisfying hard/soft timing constraints for heterogeneous embedded systems. (English)
ACM Trans. Des. Autom. Electron. Syst. 14, No. 2 (2009).
76
Provably correct on-chip communication: A formal approach to automatic protocol converter synthesis. (English)
ACM Trans. Des. Autom. Electron. Syst. 14, No. 2 (2009).
77
Boxrouter 2.0: A hybrid and robust global router with layer assignment for routability. (English)
ACM Trans. Des. Autom. Electron. Syst. 14, No. 2 (2009).
78
Instrumenting AMS assertion verification on commercial platforms. (English)
ACM Trans. Des. Autom. Electron. Syst. 14, No. 2 (2009).
79
Efficient partial scan cell gating for low-power scan-based testing. (English)
ACM Trans. Des. Autom. Electron. Syst. 14, No. 2 (2009).
80
Result 61 to 80 of 434 total