Result 1 to 20 of 116 total
Verilog designer’s library. Incl. 1 CD-ROM. (English)
Upper Saddle River, NJ: Prentice Hall PTR. xv, 411 p. \$ 74.95 (1999).
1
Digital systems design with VHDL and synthesis. An integrated approach. (English)
Los Alamitos, CA: IEEE Computer Society. xv, 499 p. \$ 55.00 (1999).
2
High-level power analysis and optimization. (English)
Boston: Kluwer Academic Publishers. xvi, 175 p. Dfl 215.00; \$ 98.00; \sterling 64.70 (1998).
3
Dynamic power management. Design techniques and CAD tools. (English)
Boston: Kluwer Academic Publishers. xiii, 231 p. Dfl 230.00; \$ 105.00; \sterling 69.30 (1998).
4
The linear kernel of Boolean functions and partially-bent functions. (English)
Syst. Sci. Math. Sci. 10, No.1, 6-11 (1997).
5
Reasoning in Boolean networks. Logic synthesis and verification using testing techniques. (English)
Frontiers in Electronic Testing. 9. Boston: Kluwer Academic Publishers. xv, 230 p. Dfl 180.00; \$ 89.50; \sterling 59.10 (1997).
6
CMOS wireless transceiver design. (English)
The Kluwer International Series in Engineering and Computer Science. 411. Boston: Kluwer Academic Publishers. xiv, 240 p. Dfl 245.00; \$ 115.00; \sterling 78.20 (1997).
7
On small size approximation models. (English)
Graham, Ronald L. (ed.) et al., The mathematics of Paul Erdős. Vol. I. Berlin: Springer. Algorithms Comb. 13, 385-392 (1997).
8
On the complexity of numbering operators. (English)
Discrete Math. Appl. 6, No.6, 549-561 (1996); translation from Diskretn. Mat. 8, No.4, 44-56 (1996).
9
On the complexity of restrictions of Boolean functions. (English)
Discrete Math. Appl. 6, No.3, 257-275 (1996); translation from Diskretn. Mat. 8, No.2, 133-150 (1996).
10
Some results on the decision for Sheffer functions in partial $k$-valued logic. (English)
Mult.-Valued Log. 1, No.4, 253-269 (1996).
11
A criterion of completeness for non-homogeneous functions with delays. (English)
Discrete Math. Appl. 6, No.1, 93-106 (1996); translation from Diskretn. Mat. 8, No.1, 87-100 (1996).
12
Ternary decision diagrams and their applications. (English)
Sasao, Tsutomu (ed.) et al., Representations of discrete functions. Proceedings of the IFIP WG 10.5 workshop on applications of the Reed-Muller expansions in circuit design (Reed-Muller ’95), Makuhari, Chiba, Japan. Boston, MA: Kluwer Academic Publishers. 269-292 (1996).
13
Multi-terminal binary decision diagrams and hybrid decision diagrams. (English)
Sasao, Tsutomu (ed.) et al., Representations of discrete functions. Proceedings of the IFIP WG 10.5 workshop on applications of the Reed-Muller expansions in circuit design (Reed-Muller ’95), Makuhari, Chiba, Japan. Boston, MA: Kluwer Academic Publishers. 93-108 (1996).
14
Spectral transform decision diagrams. (English)
Sasao, Tsutomu (ed.) et al., Representations of discrete functions. Proceedings of the IFIP WG 10.5 workshop on applications of the Reed-Muller expansions in circuit design (Reed-Muller ’95), Makuhari, Chiba, Japan. Boston, MA: Kluwer Academic Publishers. 55-92 (1996).
15
Binary decision diagrams and applications for VLSI CAD. (English)
The Kluwer International Series in Engineering and Computer Science. 342. Dordrecht: Kluwer Academic Publishers. xiii, 141 p. Dfl. 135.00; \$ 79.00; \sterling 53.75 (1996).
16
Der RISC-Prozessor TOOBSIE. Unter Mitarb. von Peter Blinzer, Elmar Cochlovius, Michael Schäfers u. Klaus-Peter Wachsmann. (German)
Wiesbaden: Vieweg. viii, 431 p. DM 198.00 (1995).
17
On checking tests for a parity counter. (English)
Discrete Math. Appl. 5, No.6, 603-612 (1995); translation from Diskretn. Mat. 7, No.4, 51-60 (1995).
18
Still on the problem of inclusion of regular and linear languages in group languages. (Russian)
Filomat 9, No.3, 699-710 (1995).
19
VLSI signal processing. (English)
Leondes, C. T. (ed.), Digital signal processing systems: implementation techniques. San Diego, CA: Academic Press. Control Dyn. Syst., Adv. Theory Appl. 68, 1-88 (1995).
20
Result 1 to 20 of 116 total
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