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Result 1 to 12 of 12 total

Certifying low-level programs with hardware interrupts and preemptive threads. (English)
J. Autom. Reasoning 42, No. 2-4, 301-347 (2009).
WorldCat.org
1
Rationalizing relevant primitives, of course! (English)
Bull. Sect. Log., Univ. Łódź, Dep. Log. 24, No.2, 76-79 (1995).
WorldCat.org
2
Basis Sets for Synthesis of Switching Functions. (English)
IEEE Transactions on Computers 41, No.04, 489-493 (1992).
WorldCat.org
3
The Geometry of Basis Sets for Morphologic Closing. (English)
IEEE Transactions on Pattern Analysis and Machine Intelligence 13, No.12, 1214-1224 (1991).
WorldCat.org
4
Negation and control in PROLOG. (English)
Lecture Notes in Computer Science, 238. Berlin etc.: Springer-Verlag. IX, 119 p. DM 27.00 (1986).
Reviewer: M.Šmídek
WorldCat.org
5
Temporal logic specification of synchronization primitives. (English)
Topics in the theoretical bases and applications of computer science, Proc. 4th Hung. Conf., Györ/Hung. 1985, 455-466 (1986).
WorldCat.org
6
Automating control for logic programs. (English)
J. Logic Program. 2, 167-183 (1985).
WorldCat.org
7
A hardware implementation of the CSP primitives and its verification. (English)
Automata, languages and programming, 11th Colloq., Antwerp/Belg. 1984, Lect. Notes Comput. Sci. 172, 423-435 (1984).
WorldCat.org
8
Proving failure-free properties of concurrent systems using temporal logic. (English)
ACM Trans. Program. Lang. Syst. 6, 239-253 (1984).
WorldCat.org
9
Some new types of logical completeness. (English)
IEEE Trans. Comput. 27, No. 11, 998-1005 (1978).
WorldCat.org
10
Cascade realization of 3-input 3-output conservative logic circuits. (English)
IEEE Trans. Comput. 27, No. 03, 214-221 (1978).
WorldCat.org
11
On universal logic primitives. (English)
IEEE Trans. Comput. 20, No. 04, 467-469 (1971).
WorldCat.org
12
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Result 1 to 12 of 12 total

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