Result 1 to 20 of 63 total
A dedicated monitoring infrastructure for multicore processors. (English)
IEEE Trans. VLSI Syst. 19, No. 6, 1011-1022 (2011).
1
Customizing virtual networks with partial FPGA reconfiguration. (English)
Comput. Commun. Rev. 41, No. 1, 125-132 (2011).
2
Securing the data path of next-generation router systems. (English)
Comput. Commun. 34, No. 4, 598-606 (2011).
3
A dynamically-reconfigurable phased array radar processing system (English)
FPL, 258-263 (2011).
4
Reclick - A modular dataplane design framework for FPGA-based network virtualization (English)
ANCS, 145-155 (2011).
5
Evaluation of the universal geocast scheme for vanets (English)
VTC Fall, 1-5 (2011).
6
Reconfigurable sparse matrix-vector multiplication on fpgas (English)
ERSA, 77-83 (2010).
7
Thermal-aware voltage droop compensation for multi-core architectures (English)
ACM Great Lakes Symposium on VLSI, 335-340 (2010).
8
Scalable network virtualization using fpgas (English)
FPGA, 219-228 (2010).
9
Multicore soft error rate stabilization using adaptive dual modular redundancy (English)
DATE, 27-32 (2010).
10
18th IEEE annual international symposium on field-programmable custom computing machines, FCCM 2010, charlotte, north carolina, USA, 2-4 May 2010 (English)
FCCM (2010).
11
Tetris-XL: A performance-driven spill reduction technique for embedded VLIW processors. (English)
ACM Trans. Archit. Code Optim. 6, No. 3 (2009).
12
A security approach for off-chip memory in embedded microprocessor systems (English)
Microprocessors and Microsystems - Embedded Hardware Design 33, No. 1, 37-45 (2009).
13
An interactive approach to timing accurate PCI-X simulation (English)
IEEE International Workshop on Rapid System Prototyping, 181-187 (2009).
14
Application specific customization and scalability of soft multiprocessors (English)
FCCM, 123-130 (2009).
15
Design of a secure router system for next-generation networks (English)
NSS, 52-59 (2009).
16
CMOS vs nano: comrades or rivals? (English)
FPGA, 121-122 (2009).
17
A monitor interconnect and support subsystem for multicore processors (English)
DATE, 761-766 (2009).
18
Power-efficient RAM mapping algorithms for FPGA embedded memory blocks. (English)
IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 26, No. 2, 278-290 (2007).
19
High-efficiency protection solution for off-chip memory in embedded systems (English)
ERSA, 117-123 (2007).
20
Result 1 to 20 of 63 total
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