Result 1 to 20 of 21 total
Sensor modeling, low-complexity fusion algorithms, and mixed-signal IC prototyping for gas measures in low-emission vehicles (English)
IEEE T. Instrumentation and Measurement 60, No. 2, 372-384 (2011).
1
Mixed-signal architectures for high-efficiency and low-distortion digital audio processing and power amplification. (English)
EURASIP J. Embed. Syst. 2010, Article ID 394070, 11 p. (2010).
2
Mixed-signal architectures for high-efficiency and low-distortion digital audio processing and power amplification (English)
EURASIP J. Emb. Sys. 2010 (2010).
3
Automatic synthesis of cost effective FFT/IFFT cores for VLSI OFDM systems (English)
IEICE Transactions 91-C, No. 4, 487-496 (2008).
4
Noise analysis of regenerative comparators for reconfigurable ADC architectures (English)
IEEE Trans. on Circuits and Systems 55-I, No. 6, 1441-1454 (2008).
5
Automatic generation of low-complexity FFT/IFFT cores for multi-band OFDM systems (English)
DSD, 361-368 (2007).
6
A 10.6mW/0.8pJ power-scalable 1GS/s 4b ADC in 0.18mum CMOS with 5.8GHz ERBW (English)
DAC, 873-878 (2006).
7
Mixed-signal design of a digital input power amplifier for automotive audio applications (English)
DATE Designers’ Forum, 212-216 (2006).
8
Self-adaptive algorithmic/architectural design for real-time, low-power video systems (English)
IEICE Transactions 88-D, No. 7, 1538-1545 (2005).
9
Enriching an analog platform for analog-to-digital converter design (English)
ISCAS (2), 1286-1289 (2005).
10
Design of a low-power VLSI macrocell for nonlinar adaptive video noise reduction. (English)
EURASIP J. Appl. Signal Process. 2004, No. 12, 1921-1930 (2004).
11
Design of a low-power VLSI macrocell for nonlinear adaptive video noise reduction (English)
EURASIP J. Adv. Sig. Proc. 2004, No. 12, 1921-1930 (2004).
12
Context-aware algorithmic/architectural solutions for real-time embedded video systems (English)
WISES, 79-90 (2004).
13
A QoS internet protocol scheduler on the IXP1200 network platform (English)
IWSOC, 394-399 (2003).
14
FAST: FFT ASIC automated synthesis. (English)
Integr., VLSI J. 33, No.1-2, 23-37 (2002).
15
On the realisation of delay-insensitive asynchronous circuits with CMOS ternary logic (English)
ASYNC, 54- (1997).
16
Useful application of CMOS ternary logic to the realisation of asynchronous circuits (English)
ISMVL, 203-208 (1997).
17
Linear networks and systems depending polynomially on parameters: Stability for large values subject to tolerance errors. (English)
Int. J. Circuit Theory Appl. 21, No.3, 207-231 (1993).
18
Linear networks and systems polynomially depending on parameters: behaviour of the solutions for large and small values (English)
ISCAS, 2682-2685 (1993).
19
Conditions for the existence and uniqueness of DC solutions of networks containing nonlinear opamps with ideal model (English)
ISCAS, 2498-2501 (1993).
20
Result 1 to 20 of 21 total
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