History
1
au:Shimazaki, K*
8


Please fill in your query. A complete syntax description you will find on the General Help page.
first | previous | 1 | next | last

Result 1 to 8 of 8 total

Gate delay estimation in STA under dynamic power supply noise (English)
IEICE Transactions 93-A, No. 12, 2447-2455 (2010).
WorldCat.org
1
PDF XML AMS-TeX TEXT BIBTeX URL
Gate delay estimation in STA under dynamic power supply noise (English)
ASP-DAC, 775-780 (2010).
WorldCat.org
2
PDF XML AMS-TeX TEXT BIBTeX DOI
A minimum decap allocation technique based on simultaneous switching for nanoscale soc (English)
CICC, 21-24 (2009).
WorldCat.org
3
PDF XML AMS-TeX TEXT BIBTeX DOI
An integrated timing and dynamic supply noise verification for multi-10-million gate soc designs (English)
IEICE Transactions 89-C, No. 11, 1535-1543 (2006).
WorldCat.org
4
PDF XML AMS-TeX TEXT BIBTeX DOI
Power-supply noise reduction with design for manufacturability (English)
IEICE Transactions 88-A, No. 12, 3421-3428 (2005).
WorldCat.org
5
PDF XML AMS-TeX TEXT BIBTeX DOI
Dynamic power-supply and well noise measurements and analysis for low power body biased circuits (English)
IEICE Transactions 88-C, No. 4, 589-596 (2005).
WorldCat.org
6
PDF XML AMS-TeX TEXT BIBTeX DOI
An EMI-noise analysis on LSI design with impedance estimation (English)
ISQED, 169-174 (2002).
WorldCat.org
7
PDF XML AMS-TeX TEXT BIBTeX URL
LEMINGS: lsi’s EMI-noise analysis with gate level simulator (English)
ISQED, 129-136 (2000).
WorldCat.org
8
PDF XML AMS-TeX TEXT BIBTeX URL
first | previous | 1 | next | last

Result 1 to 8 of 8 total

Valid XHTML 1.0 Transitional Valid CSS!