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io-port 05920744 Freijedo, Judit; Valdés, María Dolores; Costas, Lucía; Moure, María José; Rodríguez-Andina, Juan J.; Semião, Jorge; Vargas, Fabian; Teixeira, Isabel C.; Teixeira, João Paulo

Lower $V_{DD}$ operation of FPGA-based digital circuits through delay modeling and time borrowing. (English)

J. Low Power Electron. 7, No. 2, 185-198 (2011).

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io-port 70068147 Bexiga, Vasco; Leong, Carlos; Semião, Jorge; Teixeira, Isabel C.; Teixeira, João Paulo; Valdés, María Dolores; Freijedo, Judit; Rodríguez-Andina, Juan J.; Vargas, Fabian

Performance failure prediction using built-in delay sensors in fpgas (English)

FPL, 301-304 (2011).

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io-port 70542713 Martins, C. V.; Semião, Jorge; Vázquez, Julio César; Champac, Víctor H.; Santos, Marcelino B.; Teixeira, Isabel C.; Teixeira, João Paulo

Adaptive error-prediction flip-flop for performance failure prediction with aging sensors (English)

VTS, 203-208 (2011).

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io-port 70887831 Vázquez, Julio César; Champac, Víctor H.; Ziesemer, Adriel; Reis, Ricardo; Semião, Jorge; Teixeira, Isabel C.; Santos, Marcelino B.; Teixeira, João Paulo

Predictive error detection by on-line aging monitoring (English)

IOLTS, 9-14 (2010).

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io-port 70888423 Chipana, Raul; Bolzani, Leticia Maria Veiras; Vargas, Fabian; Semião, Jorge; Rodríguez-Andina, Juan J.; Teixeira, Isabel C.; Teixeira, Paulo J.

Investigating the use of BICS to detect resistive-open defects in srams (English)

IOLTS, 200-201 (2010).

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io-port 70888221 Semião, Jorge; Freijedo, Judit; Rodríguez-Andina, Juan J.; Vargas, Fabian; Santos, Marcelino B.; Teixeira, Isabel C.; Teixeira, João Paulo

Delay-fault tolerance to power supply voltage disturbances analysis in nanometer technologies (English)

IOLTS, 223-228 (2009).

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io-port 05765508 Semião, Jorge; Freijedo, Judit; Rodríguez-Andina, Juan J.; Vargas, Fabian; Santos, Marcelino B.; Teixeira, Isabel C.; Teixeira, Paulo J.

Time management for low-power design of digital systems. (English)

J. Low Power Electron. 4, No. 3, 410-419 (2008).

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io-port 05765505 Freijedo, Judit; Semião, Jorge; Rodríguez-Andina, Juan J.; Vargas, Fabian; Teixeira, Isabel C.; Teixeira, Paulo J.

Delay modeling for power noise and temperature-aware design and test of digital systems. (English)

J. Low Power Electron. 4, No. 3, 385-391 (2008).

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io-port 50354330 Semião, Jorge; Rodríguez-Irago, Marcial Jesús; Rodríguez-Andina, Juan J.; Piccoli, Leonardo Bisch; Vargas, Fabian; Dos Santos, Marcelino Bicho; Teixeira, Isabel Maria Cacho; Teixeira, João Paulo

Signal integrity enhancement in digital circuits (English)

IEEE Design & Test of Computers 25, No. 5, 452-461 (2008).

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io-port 70873881 Semião, Jorge; Rodríguez-Andina, Juan J.; Vargas, Fabian; Santos, Marcelino B.; Teixeira, Isabel C.; Teixeira, João Paulo

Process tolerant design using thermal and power-supply tolerance in pipeline based circuits (English)

DDECS, 34-37 (2008).

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io-port 70887873 Semião, Jorge; Freijedo, Judit; Rodríguez-Andina, Juan J.; Vargas, Fabian; Santos, Marcelino B.; Teixeira, Isabel C.; Teixeira, João Paulo

Exploiting parametric power supply and/or temperature variations to improve fault tolerance in digital circuits (English)

IOLTS, 227-232 (2008).

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io-port 70100851 Semião, Jorge; Freijedo, Judit; Rodríguez-Andina, Juan J.; Vargas, Fabian; Santos, Marcelino B.; Teixeira, Isabel C.; Teixeira, João Paulo

Enhancing the tolerance to power-supply instability in digital circuits (English)

ISVLSI, 207-212 (2007).

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io-port 70785358 Semião, Jorge; Rodríguez-Andina, Juan J.; Vargas, Fabian; Dos Santos, Marcelino Bicho; Teixeira, Isabel C.; Teixeira, João Paulo

Improving the tolerance of pipeline based circuits to power supply or temperature variations (English)

DFT, 303-311 (2007).

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io-port 70873727 Semião, Jorge; Freijedo, Judit; Rodríguez-Andina, Juan J.; Vargas, Fabian; Santos, Marcelino B.; Teixeira, Isabel C.; Teixeira, João Paulo

Improving tolerance to power-supply and temperature variations in synchronous circuits (English)

DDECS, 295-300 (2007).

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io-port 70887867 Semião, Jorge; Freijedo, Judit; Rodríguez-Andina, Juan J.; Vargas, Fabian; Santos, Marcelino B.; Teixeira, Isabel C.; Teixeira, João Paulo

On-line dynamic delay insertion to improve signal integrity in synchronous circuits (English)

IOLTS, 167-172 (2007).

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io-port 70873856 Guerreiro, F.; Semião, Jorge; Pierce, A.; Santos, Marcelino B.; Teixeira, Isabel C.; Teixeira, João Paulo

Functional-oriented BIST of sequential circuits aiming at dynamic faults coverage (English)

DDECS, 279-284 (2006).

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io-port 70888137 Rodríguez-Irago, Marcial Jesús; Rodríguez-Andina, Juan J.; Vargas, Fabian; Semião, Jorge; Teixeira, Isabel C.; Teixeira, João Paulo

Dynamic fault detection in digital systems using dynamic voltage scaling and multi-temperature schemes (English)

IOLTS, 257-262 (2006).

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io-port 70691159 Zorian, Yervant; Prinetto, Paolo; Teixeira, João Paulo; Teixeira, Isabel C.; Pereira, Carlos Eduardo; Dias, Octávio Páscoa; Semião, Jorge; Muhmenthaler, Peter; Radermacher, W.

Embedded tutorial: TRP: integrating embedded test and ATE (English)

DATE, 34-37 (2001).

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io-port 70036964 Dias, Octávio Páscoa; Semião, Jorge; Santos, Marcelino B.; Teixeira, Isabel C.; Teixeira, João Paulo

Quality of electronic design: from architectural level to test coverage (English)

ISQED, 197- (2000).

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