Result 1 to 20 of 35 total
Herramientas de manufactura esbelta aplicadas al desarrollo de software con calidad (English)
RASI 8, No. 2, 135-142 (2011).
1
High-performance robust latches (English)
IEEE Trans. Computers 59, No. 11, 1455-1465 (2010).
2
Low cost and low intrusive approach to test on-line the scheduler of high performance microprocessors (English)
Conf. Computing Frontiers, 113-114 (2010).
3
Novel low-cost aging sensor (English)
Conf. Computing Frontiers, 93-94 (2010).
4
Novel high speed robust latch (English)
DFT, 65-73 (2009).
5
Concurrent detection of faults affecting energy harvesting circuits of self-powered wearable sensors (English)
DFT, 127-135 (2009).
6
Checkers’ no-harm alarms and design approaches to tolerate them (English)
J. Electronic Testing 24, No. 1-3, 93-103 (2008).
7
Function-inherent code checking: A new low cost on-line testing approach for high performance microprocessor control logic (English)
European Test Symposium, 171-176 (2008).
8
Novel on-chip clock jitter measurement scheme for high performance microprocessors (English)
DFT, 465-473 (2008).
9
Latch susceptibility to transient faults and new hardening approach. (English)
IEEE Trans. Comput. 56, No. 09, 1255-1268 (2007).
10
Latch susceptibility to transient faults and new hardening approach (English)
IEEE Trans. Computers 56, No. 9, 1255-1268 (2007).
11
Novel approach to clock fault testing for high performance microprocessors (English)
VTS, 441-446 (2007).
12
Low-cost and highly reliable detector for transient and crosstalk faults affecting FPGA interconnects (English)
DATE, 170-175 (2006).
13
Can clock faults be detected through functional test? (English)
DDECS, 168-173 (2006).
14
Checker no-harm alarm robustness (English)
IOLTS, 275-280 (2006).
15
Path (Min) delay faults and their impact on self-checking circuits’ operation (English)
IOLTS, 17-22 (2006).
16
Low Cost and High Speed Embedded Two-Rail Code Checker. (English)
IEEE Transactions on Computers 54, No.02, 153-164 (2005).
17
Low cost and high speed embedded two-rail code checker (English)
IEEE Trans. Computers 54, No. 2, 153-164 (2005).
18
Novel on-chip circuit for jitter testing in high-speed plls (English)
IEEE T. Instrumentation and Measurement 54, No. 5, 1779-1788 (2005).
19
Low cost scheme for on-line clock skew compensation (English)
VTS, 90-95 (2005).
20
Result 1 to 20 of 35 total
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