Towards resilient micro-architectures: datapath reliability enhancement using STT-MRAM (English)
ISVLSI, 236-241 (2011).
1
Enabling architectural innovations using non-volatile memory (English)
ACM Great Lakes Symposium on VLSI, 439-444 (2011).
2
Custom built heterogeneous multi-core architectures (CUBEMACH): breaking the conventions (English)
IPDPS Workshops, 1-15 (2010).
3
Towards modeling and integrated design automation of supercomputing clusters (MIDAS). (English)
Comput. Sci., Res. Develop. 24, No. 1-2, 1-10 (2009).
4
Towards modeling and integrated design automation of supercomputing clusters (MIDAS) (English)
Computer Science - R&D 24, No. 1-2, 1-10 (2009).
5
A non-uniform grid based ground plane model for high performance nodes: the impact of heterogeneous cores on ground voltage gradient (English)
ISVLSI, 49-54 (2009).
6