Result 1 to 20 of 26 total
A cost-effective technique for mapping bluts to qluts in fpgas (English)
FPL, 332-335 (2010).
1
Multiple bit error detection and correction in memory (English)
DSD, 652-657 (2010).
2
Increasing memory yield in future technologies through innovative design (English)
ISQED, 622-626 (2009).
3
Reliability aware yield improvement technique for nanotechnology based circuits (English)
SBCCI (2009).
4
New challenges for designers of fault tolerant embedded systems based on future technologies (English)
IESS, 312-313 (2009).
5
Invariant checkers: an efficient low cost technique for run-time transient errors detection (English)
IOLTS, 35-40 (2009).
6
A fast error correction technique for matrix multiplication algorithms (English)
IOLTS, 133-137 (2009).
7
Performance analysis of multi-service wireless network: an approach integrating CAC, scheduling, and buffer management (English)
Computers & Electrical Engineering 34, No. 4, 346-356 (2008).
8
Majority logic mapping for soft error dependability (English)
J. Electronic Testing 24, No. 1-3, 83-92 (2008).
9
Hardware and software transparency in the protection of programs against seus and sets (English)
J. Electronic Testing 24, No. 1-3, 45-56 (2008).
10
Algorithm level fault tolerance: A technique to cope with long duration transient faults in matrix multiplication algorithms (English)
VTS, 363-370 (2008).
11
XOR-based low cost checkers for combinational logic (English)
DFT, 281-289 (2008).
12
A soft error robust and power aware memory design (English)
SBCCI, 300-305 (2007).
13
Using majority logic to cope with long duration transient faults (English)
SBCCI, 354-359 (2007).
14
Algorithm for graphical Bayesian modeling based on multiple regressions (English)
MICAI, 496-506 (2007).
15
System level approaches for mitigation of long duration transient faults in future technologies (English)
European Test Symposium, 165-172 (2007).
16
A low-SER efficient core processor architecture for future technologies (English)
DATE, 1448-1453 (2007).
17
A Markovian sensibility analysis for parallel processing scheduling on GNU/linux (English)
ISPA Workshops, 269-278 (2006).
18
A Markovian performance model for resource allocation scheduling on GNU/linux (English)
ISPA Workshops, 844-853 (2006).
19
SET fault tolerant combinational circuits based on majority logic (English)
DFT, 345-352 (2006).
20
Result 1 to 20 of 26 total