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Result 1 to 17 of 17 total

ERSA: error resilient system architecture for probabilistic applications (English)
DATE, 1560-1565 (2010).
WorldCat.org
1
A framework of energy efficient mobile sensing for automatic user state recognition (English)
MobiSys, 179-192 (2009).
WorldCat.org
2
Virtual trip lines for distributed privacy-preserving traffic monitoring (English)
MobiSys, 15-28 (2008).
WorldCat.org
3
Disintermediated active communication. (English)
IEEE Computer Architecture Letters 05, No. 02 (2006).
WorldCat.org
4
Disintermediated active communication (English)
Computer Architecture Letters 5, No. 2 (2006).
WorldCat.org
5
Architectural support for software transactional memory (English)
MICRO, 185-196 (2006).
WorldCat.org
6
Trace preconstruction (English)
ISCA, 37-46 (2000).
WorldCat.org
7
Instruction pre-processing in trace processors (English)
HPCA, 125-129 (1999).
WorldCat.org
8
A study of control independence in superscalar processors (English)
HPCA, 115-124 (1999).
WorldCat.org
9
Web prefetching between low-bandwidth clients and proxies: potential and performance (English)
SIGMETRICS, 178-187 (1999).
WorldCat.org
10
Destage Algorithms for Disk Arrays with Nonvolatile Caches. (English)
IEEE Transactions on Computers 47, No.02, 228-235 (1998).
WorldCat.org
11
Destage algorithms for disk arrays with nonvolatile caches. (English)
IEEE Trans. Comput. 47, No. 2, 228-235 (1998).
WorldCat.org
12
Destage algorithms for disk arrays with nonvolatile caches (English)
IEEE Trans. Computers 47, No. 2, 228-235 (1998).
WorldCat.org
13
Path-based next trace prediction (English)
MICRO, 14-23 (1997).
WorldCat.org
14
Control flow speculation in multiscalar processors (English)
HPCA, 218-229 (1997).
WorldCat.org
16
Destage algorithms for disk arrays with non-volatile caches (English)
ISCA, 83-95 (1995).
WorldCat.org
17
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Result 1 to 17 of 17 total

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