Result 1 to 20 of 210 total
RAFT: A router architecture with frequency tuning for on-chip networks. (English)
J. Parallel Distrib. Comput. 71, No. 5, 625-640 (2011).
1
Aérgia: A network-on-chip exploiting packet latency slack (English)
IEEE Micro 31, No. 1, 29-41 (2011).
2
A case for heterogeneous on-chip interconnects for cmps (English)
ISCA, 389-400 (2011).
3
Architecting on-chip interconnects for stacked 3D STT-RAM caches in cmps (English)
ISCA, 69-80 (2011).
4
A dynamic energy management scheme for multi-tier data centers (English)
ISPASS, 257-266 (2011).
5
Probably approximately correct coverage for robots with uncertainty (English)
IROS, 1160-1166 (2011).
6
ACCESS: smart scheduling for asymmetric cache cmps (English)
HPCA, 527-538 (2011).
7
METE: meeting end-to-end QoS in multicores through system-wide resource management (English)
SIGMETRICS, 13-24 (2011).
8
Integration of admission, congestion, and peak power control in QoS-aware clusters. (English)
J. Parallel Distrib. Comput. 70, No. 11, 1087-1099 (2010).
9
On the effects of process variation in network-on-chip architectures (English)
IEEE Trans. Dependable Sec. Comput. 7, No. 3, 240-254 (2010).
10
Cooperative caching in wireless P2P networks: design, implementation, and evaluation (English)
IEEE Trans. Parallel Distrib. Syst. 21, No. 2, 229-241 (2010).
11
Stochastic model for the mean weight evolution of the IAF-PNLMS algorithm (English)
IEEE Transactions on Signal Processing 58, No. 11, 5895-5901 (2010).
12
A PNLMS algorithm with individual activation factors (English)
IEEE Transactions on Signal Processing 58, No. 4, 2036-2047 (2010).
13
A superscalar software architecture model for multi-core processors (MCPs) (English)
Journal of Systems and Software 83, No. 10, 1823-1837 (2010).
14
Relevant and non-redundant amino acid sequence selection for protein functional site identification (English)
IJSSCI 2, No. 2, 19-43 (2010).
15
Network-on-chip architectures - A holistic design exploration (English)
Lecture Notes in Electrical Engineering 45, 1-209 (2010).
16
Aérgia: exploiting packet latency slack in on-chip networks (English)
ISCA, 106-116 (2010).
17
CPM in cmps: coordinated power management in chip-multiprocessors (English)
SC, 1-12 (2010).
18
Cost-driven 3D integration with interconnect layers (English)
DAC, 150-155 (2010).
19
Performance analysis of communications \& radar coexistence in a covert UWB OSA system (English)
GLOBECOM, 1-5 (2010).
20
Result 1 to 20 of 210 total
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