A 5.4mW $0.0035mm^{2} 0$.48psrms-jitter 0.8-to-5GHz non-PLL/DLL all-digital phase generator/rotator in 45nm SOI CMOS (English)
ISSCC, 98-99 (2009).
1
io-port 05420337 Gara, Alan;
Blumrich, Matthias A.;
Chen, Dong;
Chiu, George L.-T.;
Coteus, Paul;
Giampapa, Mark;
Haring, Ruud A.;
Heidelberger, Philip;
Hoenicke, Dirk;
Kopcsay, Gerard V.;
Liebsch, Thomas A.;
Ohmacht, Martin;
Steinmacher-Burow, Burkhard D.;
Takken, Todd;
Vranas, Pavlos
Overview of the blue gene/L system architecture. (English)
IBM J. Res. Dev. 49, No. 2-3, 195-212 (2005).
3
io-port 05420272 Coteus, Paul;
Bickford, H.Randall;
Cipolla, Thomas M.;
Crumley, Paul;
Gara, Alan;
Hall, Shawn;
Kopcsay, Gerard V.;
Lanzetta, Alphonso P.;
Mok, Lawrence S.;
Rand, Rick A.;
Swetz, Richard A.;
Takken, Todd;
La Rocca, Paul;
Marroquin, Christopher;
Germann, Philip R.;
Jeanson, Mark J.
Packaging the blue gene/L supercomputer. (English)
IBM J. Res. Dev. 49, No. 2-3, 213-248 (2005).
4
io-port 05420169 Adiga, Narasimha R.;
Blumrich, Matthias A.;
Chen, Dong;
Coteus, Paul;
Gara, Alan;
Giampapa, Mark;
Heidelberger, Philip;
Singh, Sarabjeet;
Steinmacher-Burow, Burkhard D.;
Takken, Todd;
Tsao, Mickey;
Vranas, Pavlos
Blue gene/L torus interconnection network. (English)
IBM J. Res. Dev. 49, No. 2-3, 265-276 (2005).
5
io-port 70487710 Salapura, Valentina;
Bickford, Randy;
Blumrich, Matthias A.;
Bright, Arthur A.;
Chen, Dong;
Coteus, Paul;
Gara, Alan;
Giampapa, Mark;
Gschwind, Michael;
Gupta, Manish;
Hall, Shawn;
Haring, Ruud A.;
Heidelberger, Philip;
Hoenicke, Dirk;
Kopcsay, Gerard V.;
Ohmacht, Martin;
Rand, Rick A.;
Takken, Todd;
Vranas, Pavlos
Power and performance optimization at the system level (English)
Conf. Computing Frontiers, 125-132 (2005).
6
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