Result 1 to 20 of 78 total
Safe nondeterminism in a deterministic-by-default parallel language (English)
POPL, 535-548 (2011).
1
Rethinking shared-memory languages and hardware (English)
ICS, 1 (2011).
2
Architectures for online error detection and recovery in multicore processors (English)
DATE, 533-538 (2011).
3
Parallel SAH k-D tree construction (English)
High Performance Graphics, 77-86 (2010).
4
Mswat: low-cost hardware fault detection and diagnosis for multicore systems (English)
MICRO, 122-132 (2009).
5
Memory models: a case for rethinking parallel languages and hardware (English)
SPAA, 45 (2009).
6
io-port 70669061 Jr., Robert L. Bocchino;
Adve, Vikram S.;
Dig, Danny;
Adve, Sarita V.;
Heumann, Stephen;
Komuravelli, Rakesh;
Overbey, Jeffrey;
Simmons, Patrick;
Sung, Hyojin;
Vakilian, Mohsen
A type and effect system for deterministic parallel Java (English)
OOPSLA, 97-116 (2009).
7
Memory models: a case for rethinking parallel languages and hardware (English)
PODC, 2 (2009).
8
Accurate microarchitecture-level fault modeling for studying hardware faults (English)
HPCA, 105-116 (2009).
9
Guest editors’ introduction: Top picks from the computer architecture conferences of 2007. (English)
IEEE Micro 28, No. 01, 8-11 (2008).
10
Guest editors’ introduction: top picks from the computer architecture conferences of 2007 (English)
IEEE Micro 28, No. 1, 8-11 (2008).
11
Foundations of the C++ concurrency memory model (English)
PLDI, 68-78 (2008).
12
Online estimation of architectural vulnerability factor for soft errors (English)
ISCA, 341-352 (2008).
13
Metrics for architecture-level lifetime reliability analysis (English)
ISPASS, 202-212 (2008).
14
Understanding the propagation of hard errors to software and implications for resilient system design (English)
ASPLOS, 265-276 (2008).
15
Using likely program invariants to detect hardware errors (English)
DSN, 70-79 (2008).
16
Trace-based microarchitecture-level diagnosis of permanent hardware faults (English)
DSN, 22-31 (2008).
17
Cross-component energy management: Joint adaptation of processor and memory. (English)
ACM Trans. Archit. Code Optim. 4, No. 3 (2007).
18
ALP: Efficient support for all levels of parallelism for complex media applications. (English)
ACM Trans. Archit. Code Optim. 4, No. 1 (2007).
19
Architecture-level soft error analysis: examining the limits of common assumptions (English)
DSN, 266-275 (2007).
20
Result 1 to 20 of 78 total
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