Result 1 to 20 of 45 total
Searching the sky with CONFIGR-STARS. (English)
Neural Netw. 24, No. 2, 208-216 (2011).
1
A machine learning approach to modeling power and performance of chip multiprocessors (English)
ICCD, 45-50 (2011).
2
Risk adjusted multicriteria supplier selection models with applications. (English)
Int. J. Prod. Res. 48, No. 2, 405-424 (2010).
3
Experiments in multiple criteria selection problems with multiple decision makers. (English)
Int. J. Oper. Res. 7, No. 4, 413-428 (2010).
4
Multi-criteria mathematical model for designing the distribution network of a consumer goods company (English)
Computers & Industrial Engineering 58, No. 4, 584-593 (2010).
5
Efficient parallel testing and diagnosis of digital microfluidic biochips (English)
JETC 5, No. 2 (2009).
6
A multi-threaded DNA tag/anti-tag library generator for multi-core platforms (English)
CIBCB, 168-175 (2009).
7
Accelerating the Gauss-seidel power flow solver on a high performance reconfigurable computer (English)
FCCM, 227-230 (2009).
8
Simulation for predictive control of a distribution center (English)
Winter Simulation Conference, 2426-2435 (2009).
9
A stream chip-multiprocessor for bioinformatics (English)
SIGARCH Computer Architecture News 36, No. 2, 2-9 (2008).
10
Reduced dimensional HRTF processing for gaming environments (English)
Advances in Computer Entertainment Technology, 413 (2008).
11
Design techniques for micro-power algorithmic analog-to-digital converters. (English)
J. Low Power Electron. 3, No. 1, 60-69 (2007).
12
Vendor selection in outsourcing. (English)
Comput. Oper. Res. 34, No. 12, 3725-3737 (2007).
13
Vendor selection in outsourcing (English)
Computers & OR 34, No. 12, 3725-3737 (2007).
14
Power optimized design of CMOS programmable gain amplifiers. (English)
J. Low Power Electron. 2, No. 2, 259-270 (2006).
15
Multiple fault diagnosis in digital microfluidic biochips (English)
JETC 2, No. 4, 262-276 (2006).
16
Automated design flow for diode-based nanofabrics (English)
JETC 2, No. 3, 219-241 (2006).
17
Error correction in pipelined ADCS using arbitrary radix calibration (English)
VLSI Design, 157-162 (2004).
18
A low voltage CMOS transresistance-based variable gain amplifier (English)
ISCAS (1), 809-812 (2004).
19
A novel queuing architecture for background calibration of pipeline adcs (English)
ISCAS (1), 65-68 (2004).
20
Result 1 to 20 of 45 total
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