Result 141 to 160 of 266 total
DIF: an interchange format for dataflow-based design tools (English)
SAMOS, 423-432 (2004).
141
Systematic integration of parameterized local search techniques in evolutionary algorithms (English)
GECCO (2), 383-384 (2004).
142
ASET: A formal model for system emulation and verification (English)
IEEE International Workshop on Rapid System Prototyping, 21-28 (2004).
143
Impact of BGP dynamics on router CPU utilization (English)
PAM, 278-288 (2004).
144
Dynamic filter cache for low power instruction memory hierarchy (English)
DSD, 607-610 (2004).
145
Compact procedural implementation in DSP software synthesis through recursive graph decomposition (English)
SCOPES, 47-61 (2004).
146
CHARMED: A multi-objective co-synthesis framework for multi-mode embedded systems (English)
ASAP, 28-40 (2004).
147
Decode filter cache for energy efficient instruction cache hierarchy in super scalar architectures (English)
ASP-DAC, 373-379 (2004).
148
Topology, search, and fault tolerance in unstructured P2P networks (English)
HICSS (2004).
149
Hybridization of blind source separation and rough sets for proteomic biomarker indentification (English)
ICAISC, 486-491 (2004).
150
Characterization of failures in an IP backbone network (English)
INFOCOM (2004).
151
Java-through-C compilation: an enabling technology for Java in embedded systems (English)
DATE, 161-167 (2004).
152
The impact of BGP dynamics on intra-domain traffic (English)
SIGMETRICS, 319-330 (2004).
153
Efficient rate-controlled bulk data transfer using multiple multicast groups. (English)
IEEE/ACM Trans. Netw. 11, No. 6, 895-907 (2003).
154
Introduction to the two special issues on memory. (English)
ACM Trans Embed. Comput. Syst. 2, No. 1, 1-4 (2003).
155
Guest Editors’ Introduction: Taking on the Embedded System Design Challenge. (English)
Computer 36, No.04, 35-37 (2003).
156
Logic foundry: Rapid prototyping for FPGA-based DSP systems. (English)
EURASIP J. Appl. Signal Process. 2003, No. 6, 565-579 (2003).
157
Genetic search over probability spaces. (English)
Eur. J. Oper. Res. 144, No.2, 333-347 (2003).
158
Logic foundry: rapid prototyping for FPGA-based DSP systems (English)
EURASIP J. Adv. Sig. Proc. 2003, No. 6, 565-579 (2003).
159
Editorial (English)
EURASIP J. Adv. Sig. Proc. 2003, No. 6, 491-493 (2003).
160
Result 141 to 160 of 266 total
Start
Contact
Print
General Help
