Full-chip analysis of unintentional forward biased diodes (English)
ISQED, 62-66 (2011).
1
Pessimism reduction in crosstalk noise aware STA (English)
ICCAD, 954-961 (2005).
2
A methodology for chip-level electromigration risk assessment and product qualification (English)
ISQED, 232-237 (2004).
3
Noise propagation and failure criteria for VLSI designs (English)
ICCAD, 587-594 (2002).
4
Clarinet: a noise analysis tool for deep submicron design (English)
DAC, 233-238 (2000).
5