Result 241 to 252 of 252 total
Fault-tolerant microcomputer design and application for railway train control (English)
IFIP Congress (1), 652-658 (1992).
241
Architecture of the XL C++ browser (English)
CASCON, 369-379 (1992).
242
A data path verifier for register transfer level using temporal logic language Tokio. (English)
Computer-aided verification ’90, Proc. 2nd DIMACS Workshop, New Brunswick/NJ (USA) 1990, DIMACS, Ser. Discret. Math. Theor. Comput. Sci. 3, 493-504 (1991).
243
A data path verifier for register transfer level using temporal logic language tokio (English)
CAV, 76-85 (1990).
244
Concurrent programming in COB (English)
Concurrency: Theory, Language, And Architecture, 142-156 (1989).
245
Logic design assistence using temporal logic based language tokio (English)
LP, 174-183 (1989).
246
MENDELS: Concurrent program synthesis system using temporal logic. (English)
Logic programming, Proc. 6th Conf., Tokyo/Jap. 1987, Lect. Notes Comput. Sci. 315, 50-68 (1988).
247
MENDELS: concurrent program synthesis system using temporal logic (English)
LP, 50-68 (1987).
248
Using the temporal logic programming language tokio for algorithm description and automatic CMOS gate array synthesis (English)
LP, 246-255 (1985).
249
A new 4 ghz 90 mbps digital radio system using 64-QAM modulation (English)
ICC (2), 642-645 (1984).
250
An NMOS microcomputer peripheral interface unit incorporating an analog-to-digital converter. (English)
IEEE Trans. Comput. 29, No. 02, 102-107 (1980).
251
An NMOS microcomputer peripheral interface unit incorporating an analog-to-digital converter (English)
IEEE Trans. Computers 29, No. 2, 102-107 (1980).
252
Result 241 to 252 of 252 total