io-port.net

io-port 71019782 Guz, Zvika; Itzhak, Oved; Keidar, Idit; Kolodny, Avinoam; Mendelson, Avi; Weiser, Uri C.

Threads vs. Caches: modeling the behavior of parallel workloads (English)

ICCD, 274-281 (2010).

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io-port 50099101 Guz, Zvika; Bolotin, Evgeny; Keidar, Idit; Kolodny, Avinoam; Mendelson, Avi; Weiser, Uri C.

Many-core vs. Many-thread machines: stay away from the valley (English)

Computer Architecture Letters 8, No. 1, 25-28 (2009).

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io-port 70703135 Eran, Haggai; Lutzky, Ohad; Guz, Zvika; Keidar, Idit

Transactifying apacHe’s cache module (English)

SYSTOR, 2 (2009).

3

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io-port 50300003 Guz, Zvika

Review of SPAA’08 (English)

SIGACT News 39, No. 4, 66-68 (2008).

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io-port 70600533 Guz, Zvika; Keidar, Idit; Kolodny, Avinoam; Weiser, Uri C.

Utilizing shared data in chip multiprocessors with the nahalal architecture (English)

SPAA, 1-10 (2008).

5

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io-port 05330926 Guz, Zvika; Keidar, Idit; Kolodny, Avinoam; Weiser, Uri

Nahalal: Cache organization for chip multiprocessors. (English)

IEEE Computer Architecture Letters 06, No. 01 (2007).

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io-port 50079555 Guz, Zvika; Walter, Isask’har; Bolotin, Evgeny; Cidon, Israel; Ginosar, Ran; Kolodny, Avinoam

Network delays and link capacities in application-specific wormhole nocs (English)

VLSI Design 2007 (2007).

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io-port 50099143 Guz, Zvika; Keidar, Idit; Kolodny, Avinoam; Weiser, Uri C.

Nahalal: cache organization for chip multiprocessors (English)

Computer Architecture Letters 6, No. 1, 21-24 (2007).

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io-port 70181340 Bolotin, Evgeny; Guz, Zvika; Cidon, Israel; Ginosar, Ran; Kolodny, Avinoam

The power of priority: noc based distributed cache coherency (English)

NOCS, 117-126 (2007).

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io-port 70690166 Guz, Zvika; Walter, Isask’har; Bolotin, Evgeny; Cidon, Israel; Ginosar, Ran; Kolodny, Avinoam

Efficient link capacity and QoS design for network-on-chip (English)

DATE, 9-14 (2006).

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