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Result 1 to 16 from 16 total

Symmetry measure for memory test and its application in BIST optimization (English)
J. Electronic Testing 27, No. 6, 753-766 (2011).
WorldCat.org
1
Generic BIST architecture for testing of content addressable memories (English)
IOLTS, 86-91 (2011).
WorldCat.org
2
The equivalence problem of deterministic multitape finite automata: A new proof of solvability using a multidimensional tape. (English)
Dediu, Adrian-Horia (ed.) et al., Language and automata theory and applications. 4th international conference, LATA 2010, Trier, Germany, May 24‒28, 2010. Proceedings. Berlin: Springer (ISBN 978-3-642-13088-5/pbk). Lecture Notes in Computer Science 6031, 392-402 (2010).
WorldCat.org
3
The equivalence problem of deterministic multitape finite automata: A new proof of solvability using a multidimensional tape (English)
LATA, 392-402 (2010).
WorldCat.org
4
An approach for formal verification of business processes (English)
SpringSim (2009).
WorldCat.org
5
The equivalence problem of multidimensional multitape automata. (English)
J. Comput. Syst. Sci. 74, No. 7, 1131-1138 (2008).
WorldCat.org
6
Alternative combination of processes (English)
PDPTA, 576-582 (2006).
WorldCat.org
7
SoC Yield Optimization via an Embedded-Memory Test and Repair Infrastructure. (English)
IEEE Design and Test of Computers 21, No.03, 200-207 (2004).
WorldCat.org
8
Soc yield optimization via an embedded-memory test and repair infrastructure (English)
IEEE Design & Test of Computers 21, No. 3, 200-207 (2004).
WorldCat.org
9
A methodology for design and evaluation of redundancy allocation algorithms (English)
VTS, 249-260 (2004).
WorldCat.org
10
Embedded-Memory Test and Repair: Infrastructure IP for SoC Yield. (English)
IEEE Design and Test of Computers 20, No.03, 58-66 (2003).
WorldCat.org
11
Embedded-memory test and repair: infrastructure IP for soc yield (English)
IEEE Design & Test of Computers 20, No. 3, 58-66 (2003).
WorldCat.org
12
An approach for evaluation of redunancy analysis algorithms (English)
MTDT, 51- (2001).
WorldCat.org
13
A Unified Design Methodology for Offline and Online Testing. (English)
IEEE Design and Test of Computers 15, No.02, 73-79 (1998).
WorldCat.org
14
A unified design methodology for offline and online testing (English)
IEEE Design & Test of Computers 15, No. 2, 73-79 (1998).
WorldCat.org
15
An approach for system tests design and its application (English)
VTS, 448-453 (1995).
WorldCat.org
16
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Result 1 to 16 from 16 total

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