id: 01760605
dt: j
an: 01760605
au: Al-Rawi, Ghazi A.
ti: A new dynamic latch offset measurement technique for offset cancellation.
so: Circuits Syst. Signal Process. 21, No.2, 137-148 (2002).
py: 2002
pu: Birkhäuser Boston Inc. (Springer), Boston, MA
la: EN
cc: 
ut: CMOS comparators; offset measurement; offset cancellation; latched
    comparator; dynamic latch
ci: 
li: doi:10.1007/s00034-002-2002-z
ab: Summary: This paper introduces a new technique that uses a differential
    amplifier in closed-loop negative feedback configuration to measure the
    offset of a dynamic latch. This offset can then be stored and canceled
    using standard techniques, thus allowing gain reduction in the
    preamplifier stages in high-resolution comparators. Input offset
    storage was used to cancel the offset of the feedback differential
    amplifier itself without adding any extra timing overhead. A
    complementary metal oxide semiconductor (CMOS) comparator was designed
    based on the proposed technique. The comparator consists of a
    preamplifier followed by a dynamic latch with series capacitors in
    between to cancel the offsets of both stages. The output of the
    comparator drives a 1 pF load capacitance and is held valid for at
    least $75\%$ of the cycle. The performance of the comparator was
    simulated using HSPICE with the worst-case combination of differences
    as large as 10 mV between the thresholds of nominally identical
    transistors, where it achieved an offset of 400 $μ$V at a 40 MHz clock
    rate in 0.6 $μ$ CMOS technology while dissipating 1 mW from a 3.3 V
    power supply.
rv: