id: 06069182
dt: a
an: 06069182
au: Burignat, Stéphane; Thomsen, Michael Kirkedal; Klimczak, Michał; Olczak,
    Mariusz; De Vos, Alexis
ti: Interfacing reversible pass-transistor CMOS chips with conventional
    restoring CMOS circuits.
so: De Vos, Alexis (ed.) et al., Reversible computation. Third international
    workshop, RC 2011, Gent, Belgium, July 4‒5, 2011. Revised papers.
    Berlin: Springer (ISBN 978-3-642-29516-4/pbk). Lecture Notes in
    Computer Science 7165, 112-122 (2012).
py: 2012
pu: Berlin: Springer
la: EN
cc: 
ut: 
ci: 
li: doi:10.1007/978-3-642-29517-1_10
ab: Summary: Recent progress on the prototyping of reversible digital circuits,
    have shown that adiabatic reversible dual-line pass-transistor logic
    can be used for special purpose applications in reversible computation.
    This, however, raises new issues regarding the compatibility between
    this adiabatic logic implementation and conventional CMOS logic. The
    greatest difficulty is brought by the difference in signal shape used
    by these two logic families. Whereas standard switching CMOS circuits
    are operated by rectangular pulses, dual-line pass-transistor
    reversible circuits are controlled by triangular or trapezoidal signals
    to ensure adiabatic switching of the transistors. This work proposes a
    simple technical solution that allows interfacing reversible
    pass-transistor logic with conventional CMOS logic, represented here by
    an FPGA embedded in a commercial Xilinx Spartan-3E board. All proposed
    solutions have successfully been tested, which enables the FPGA to
    perform calculations directly on a reversible chip.
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